U3X4-PCIE4XE306 | Quad Channel 4-port (1-port x 4) USB 3.0 to PCI Express x4 Gen 2 Host Card | USB 3.0 Machine Vision Frame Grabber

U3X4-PCIE4XE306

Quad Channel 4-port (1-port x 4) USB 3.0 to PCI Express x4 Gen 2 Host Card

Quad Channel 4-port (1-port x 4) USB 3.0 to PCI Express x4 Gen 2 Host Card

Highlights

  • Host Bus: PCIe x4 Gen 2
    • Compliant with PCI Express Base Specification Revision 2.0
  • Four independent USB 3.0 (5Gbps) Host Controllers (Renesas uPD720202; USB IF TID 380000043)
    • Compliant with Universal Serial Bus 3.0 specification Revision 1.0
    • Compliant with Intel’s eXtensible Host Controller Interface (xHCI) specification Revision 1.0
  • Supports UASP (USB Attached SCSI Protocol)
  • Four USB 3.0 (5Gbps) Cable Ports (Type-C Receptacle, USB IF TID 5200000315)
    • Provides cable lock mechanism
  • The Vbus of each USB Port has a 2.0A Single Channel Current-Limited Power Switch for protection; UL File Number E322375 (AP2311) 

Introduction

The U3X4-PCIE4XE306 is a Quad channel USB 3.0 (5Gbps) to PCI Express x4 Gen 2 Host Adapter.

U3X4-PCIE4XE306 is designed with the following two key components.

  • 8-Lane, 5-Port PCI Express Gen 2 Switch.
  • PCI Express to USB 3.0 Single Chip Host Controller (Renesas uPD720202; USB IF TID 380000043).

Utilizing the standard PCI Express Switch, the 8-Lane/8-Port PCI Express Switch provides the most efficient fan-out solution for integrating four PCI Express to USB 3.0 Single Chip Host controllers into a small board design. Each USB 3.0 to PCI Express Single Chip Host controller takes advantages of 5 Gbps burst rate of 4-lane PCI Express bus in both directions and is fully compliant with PCI Express Base specification r2.0. This solution provides full PCI Express and USB 3.0 functionality and performance.

Technical Specifications

Primary PCI Express
  • Standards compliant
    • Compliant with PCI Express Base Specification Revision 2.1
    • Compliant with PCI Express CEM Specification Revision 2.0
    • Compliant with PCI-to-PCI Bridge Architecture Specification Revision 1.2
    • Compliant with Advanced Configuration Power Interface (ACPI) Specification
    • PCI Power Management Spec r1.2
  • PCI Express Power Management
    • Link power management states: L0, L0s, L1, L2/L3 Ready, and L3
    • Device states: D0 and D3hot
    • Active state power management for L0s and L1 states
  • Port Arbitration Round Robin (RR) and Weighted RR and Time-based Weighted RR
  • Supports “Cut-through”(Default) as well as “Store and Forward” mode for switching packets
  • Peer-to-peer switching between any two downstream ports
  • Supports up to 512-byte maximum payload size (setting to 256-byte)
  • Enhanced Features
    • 150ns typical latency for packet running through switch without blocking
    • Supports Access Control Service (ACS) for peer-to-peer traffic
    • Supports Address Translation (AT) packet for SR-IOV application
    • Supports OBFF and LTR
USB Features
  • Compliant with USB 3.0 Specification Revision 1.0
  • Compliant with Intel’s eXtensible Host Controller Interface (xHCI) specification Revision 1.0
  • Each USB port supporting SS/HS/FS/LS data rates (5Gbps/ 480Mbps/ 12Mbps/ 1.5Mbps)
  • Supports UASP (USB Attached SCSI Protocol)
Advanced Power Saving
  • Support all USB 3.0 Power States: U0, U1, U2 and U3
  • Support USB 2.0 Link Power management (LPM)
    • USB-IF LPM PDK Standard
  • PCIe Active State Power Management (ASPM) L0s and L1
USB3 Port

Four independent USB 3.0 (5Gbps) Cable Ports (Type-C Receptacle, USB IF TID 5200000315)

USB Bus Power Input

12V Step-Down to 5V from either PCIe 12V or Power Connector 12V (ATA 4-pin or SATA 15-pin)

The USB Bus power (5V) are step-down from 12V and the 12V input might from either PCIe Edge Connector or Auxiliary Power Connectors (J1 & J2).
Note:
If the PCIe Slot can’t supply 12V current high enough then you have to attach the Auxiliary Power from either J1 (ATA 4-pin) or J2 (SATA 15-pin).