U31X4-PCIE8XE101 | Quad Channel 8-port (2-port x 4) USB 3.1 Gen 2 to PCI Express x8 Gen 3 Host Card | Asmedia ASM3142

U31X4-PCIE8XE101

Quad Channel 8-port (2-port x 4) USB 3.1 Gen 2 to PCI Express x8 Gen 3 Host Card

Quad Channel 8-port (2-port x 4) USB 3.1 Gen 2 to PCI Express x8 Gen 3 Host Card

Highlights

  • Host Bus: PCIe x8 Gen 3 (8.0 GT/s)
    • Compliant with PCI Express Base Specification Revision 3.0
  • Four independent USB 3.1 Gen 2 (10Gbps) Host Controllers
    • Compliant with Universal Serial Bus 3.1 specification Revision 1.0
    • Compliant with Intel’s eXtensible Host Controller Interface (xHCI) specification Revision 1.1
  • Eight USB 3.1 Cable Ports (A-type Receptacle)
    • Provides USB 3.1 cable port lock mechanism
  • 5.25" ODD Form Factor (DU31X2-IPCIE2XG322)

Introduction

The U31X4-PCIE8XE101 is an Quad channel 8-port (2-port x4) USB 3.1 to PCI Express x8 Gen 3 Host Card.

U31X4-PCIE8XE101 is integrated by the following three key parts (QIP2X-PCIE8XG301, DU31X2-IPCIE2XG322, CB-S0031).

  • QIP2X-PCIE8XG301
    • Internal Dual PCIe x4 (two SFF-8643 Connectors) to PCIe x8 Gen 3 Switch Host Card
  • DU31X2-IPCIE2XG322
    • Integrated four USB 3.1 Gen 2 (10Gbps) to PCIe x2 Gen 3 (8Gbps) Host Controllers (Asmedia ASM3142, USB IF TID 5080000010).
  • Two CB-S0031
    • SFF-8643 to SFF-8643 Cable, L=50cm

    Utilizing the standard PCI Express Switch, the 16-Lane/5-Port PCI Express Switch provides the most efficient fan-out solution for integrating Quad PCI Express to USB 3.1 Single Chip Host controllers into a small board design. Each USB 3.1 to PCI Express Single Chip Host controller takes advantages of 10 Gbps burst rate of 8-lane PCI Express bus in both directions and is fully compliant with PCI Express Base specification r3.0. This solution provides full PCI Express and USB 3.1 functionality and performance.

Technical Specifications

QIP2X-PCIE8XG301

Upstream PCIe interface
  • 8-lane PCI Express
    • PCIe Gen 1 (2.5 GT/s)
    • PCIe Gen 2 (5.0 GT/s)
    • PCIe Gen 3 (8.0 GT/s)
Downstream PCIe interface
  • Two SFF-8643 Connectors (PCIe1 ~ PCIe2)
    • 85ohm, 36pin (pitch=0.75)
  • Each SFF-8643 Connector 4-lane PCI Express
    • PCIe Gen 1 (2.5 GT/s)
    • PCIe Gen 2 (5.0 GT/s)
    • PCIe Gen 3 (8.0 GT/s)
Key Features
  • Standards Compliant
    • PCI Express Base Specification, r3.0 (compatible w/ PCIe r1.0a/1.1 & 2.0)
    • PCI Power Management Spec r1.2
    • Microsoft Windows Logo Compliant
    • Supports Access Control Services
    • Dynamic link-width control
    • Dynamic SerDes Speed Control
  • High Performance
    • performancePAK
      • Multicast
      • Dynamic Buffer/FC Credit Pool
    • Non-blocking switch fabric
    • Full line rate on all ports
    • Cut-Thru packet latency of less than 100ns between symmetric (x4 to x4) ingress and egress Ports
    • 2KB Max Payload Size
  • Quality of Service (QoS)
    • Traffic Class Queuing
    • Eight Traffic Classes per port
    • Weighted round-robin source port arbitration

Lane Status LEDs

  • Slow Blink: Gen 1
  • Fast Blink: Gen 2
  • Solid: Gen 3
  • Upstream Lane Status LEDs
    • PORT0 LED: Upstream Status LED
  • Downstream Lane Status LEDs
    • PORT1 LED: Downstream Status LED (x8)
    • PORT1 & PORT2 LEDs: Downstream Status LED (x4, x4)
    • PORT1 & PORT2 & PORT3 & PORT4 LEDs: Downstream Status LED (x2, x2, x2, x2)
Switch

SW1-1&2: PCIe Port Configuration

    Switch Port Configuration
    SW 1-1 SW 1-2 PCIE 1 PCIE 2
    OFF OFF x2, x2 x2, x2

SW1-3&4: Max PCIe Data Rate

    SW1-3 SW1-4 PCIe Data Rate
    ON* OFF* Gen 3 (8.0 GT/s)
    OFF OFF Gen 2 (5.0 GT/s)
    ON ON Gen 1 (2.5 GT/s)
Computer Platform Requirements Desktop computer equipped with a PCIe 3.0 x8, x16 slot

DU31X2-IPCIE2XG322

PCI Express
  • Two SFF-8643 Connectors
    • 85ohm, 36pin (pitch=0.75)
  • Each SFF-8643 Connector 4-lane PCI Express
    • PCIe Gen 1 (2.5 GT/s)
    • PCIe Gen 2 (5.0 GT/s)
    • PCIe Gen 3 (8.0 GT/s)
USB Features
  • Up to USB 3.1 Gen 2 10Gbps
  • Compliant with Universal Serial Bus 3.1 Specification Revision 1.0
  • Compliant with Universal Serial Bus Specification Revision 2.0
  • Compliant with USB Attached SCSI Protocol Revision 1.0
  • Support Multiple INs function
  • Support USB 3.1 and USB 2.0 Link Power Management
  • Support Control, Bulk, Stream, Interrupt, Isochronous transfer type
  • Support independent port power control
  • Support overcurrent detection
  • Support Remote/Wakeup event
  • Integrate Spread Spectrum Controller for USB3.1 interface
  • Backward compatible with Legacy USB function and device
  • Support the Debugport
Number of Ports Eight USB 3.1 (Standard A-type Receptacle) cable ports

USB3 cable lock mechanism
  • Provides the threaded holes for the jack-screws of USB 3.1 A Plug w/Jackscrew lock Cable
USB Bus Power Input

DC 12V (Step-Down) from either Big IDE 4-pin DC Power Connector or/and SATA 15pin Power Connector